1. Field of the Invention
This invention relates to electronic circuits, and more particularly, to repeater circuits.
2. Description of the Related Art
As integrated circuit (IC) technology advances, the speed at which IC's operate increases while operating voltages generally decrease. As such, the distance at which signals must propagate on a die become an increasingly important factor to consider in IC design. At longer distances, on-die interconnects between a transmitter and a receiver can develop enough resistance and enough capacitance that the signal transition at the receiver can be adversely affected. Excessive propagation delay across a long signal interconnect can affect the transition at the receiver in terms of both timing and voltage levels. For example, a signal that propagates too slowly across an interconnect may in some cases not allow sufficient set-up and hold time for the receiver to properly transition from one logic level to another. Furthermore, a slow transition can cause crowbar currents in some receivers, which can lead to increased power consumption and may further lead to circuit damage in more severe cases.
In order to combat the negative effects of long signal interconnects, repeater circuits may be implemented. More particularly, repeater circuits may be placed along a signal path between a transmitter and receiver, effectively breaking a single interconnect into two interconnects. In such a configuration, a repeater circuit may overcome some of the problems of resistance and capacitance that would be present in a single signal interconnect, and may further cause faster transition times at the receiver.
Repeater circuits may be simple or complex. The simplest interconnect circuits may be implemented using an inverter, with a double inverter (i.e. a buffer) being an alternative if no logical inversion is desired. A more complex repeater circuit is shown in FIG. 1. Repeater circuit 10 may be referred to as a static-dynamic repeater circuit, as certain ones of the devices change states once in a given cycle (i.e. turn on or turn off responsive to an input transition), while certain other ones of the devices operate dynamically within the given cycle (i.e. turn on and then off responsive to an input transition).
Consider an example when the output of repeater circuit 10 is initially low and a signal on the input transitions from a logic low (‘low’) to a logic high (‘high’). Just prior to the transition, the output of inverter I5 will be high, which results in a high on the respective gate terminals of transistors N2 and N4, while transistors P2 and P4 are off. When the signal on the input transitions high, transistors N1 and N3 will turn on. Since a high was already present on the gate terminal of transistor N2 prior to the transition, both N1 and N2 will be active and thus provide a pull-down path to ground from Node 1. The pull-down of Node 1 results in the turning on of transistor P3, which in turn results in a pull-up path between the output node and VDD. Thus, the pull-up path provided by transistor P3 causes the output node to be pulled high, and this may occur prior to the input signal propagating through inverters I1 and I2.
After the output node is pulled high, the high is fed back through the feedback path that includes the inverter chain of I3, I4, and I5. This eventually results in a logic low on Node 3, which turns on transistor P2, while turning off transistor N2. When transistor P2 is active, a pull-up path is provided from Node 1 to VDD. Thus, Node 1 is pulled high, transistor P3 is turned off and therefore no longer drives the output node. However, the feedback chain comprising inverters I3-I5 may be designed such that the amount of delay it provides is greater than the amount of delay through the keeper comprising I1 and I2, and thus the output node remains high even after P3 is turned off. The other output device, N5, remains turned off (since node 2 is pulled low through transistor N3), and will not turn on until after the signal on the input node transitions from a high to a low. After transistor P3 turns off, the logic high is held on the output of inverter I2.
Thus, transistor P3 is a dynamic device in this particular circuit, since it turns on and then off responsive to an input signal transition from low to high. Similarly, N5 is also a dynamic device that will turn on and then off responsive to an input signal transition from high to low. Other devices, such as transistors P1, P5, N1, and N3, are considered static devices in this circuit, as they turn on or turn off only once in a cycle in which an input signal transition occurs.
The use of repeater circuit 10 may provide certain advantages over simpler repeater circuits, such as the aforementioned buffers and inverters. For example, repeater circuit 10 may be less susceptible to crowbar currents than a buffer or an inverter. Furthermore, power consumption may be reduced, since the output devices (which are typically much larger than other devices in the circuit) do not drive the output for the entire cycle. Instead, the output devices may provide sufficient drive to overcome the resistance and capacitance inherent in the signal interconnect long enough to enable a timely transition at the receiver, and then turned off once the output is present on the output of inverter I2.